| 000 | 00515nam a2200109Ia 4500 | ||
|---|---|---|---|
| 008 | 230817s9999 xx 000 0 und d | ||
| 100 | _aStuart Sutherland, Simon Davidmann, Peter Flake, P. Moorby | ||
| 245 | 0 | _aSystemVerilog for Design Second Edition A Guide to Using SystemVerilog for Hardware Design and Modeling | |
| 650 | _aComputer science, information & general works | ||
| 856 | _uhttps://new.zodml.org/sites/default/files/2023-08/epdf.pub_systemverilog-for-design-second-edition-a-guide-to.pdf | ||
| 942 | _cEBK | ||
| 999 |
_c41387 _d41387 |
||